CPC H04L 49/201 (2013.01) [H04L 45/245 (2013.01); H04L 45/38 (2013.01); H04L 45/48 (2013.01); H04L 45/7453 (2013.01); H04L 49/555 (2013.01); H04L 49/557 (2013.01); H04L 49/901 (2013.01)] | 18 Claims |
1. An apparatus comprising:
circuitry to:
access a packet from a memory device;
identify one or more egress ports to transmit the packet based on data identifying a multicast group associated with the packet, wherein
a link aggregation group (LAG) is associated with at least one egress port of the one or more egress ports associated with the identified multicast group and
based on unavailability of an egress port associated with the LAG, re-allocate one or more packets associated with the unavailable egress port among one or more available egress ports associated with the LAG but maintain association between one or more packets and at least one other available egress port associated with the LAG.
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