US 11,715,766 B2
Stacked high barrier III-V power semiconductor diode
Daniel Fuhrmann, Heilbronn (DE); Gregor Keller, Heilbronn (DE); and Clemens Waechter, Lauffen am Neckar (DE)
Assigned to AZUR SPACE Solar Power GmbH, Heilbronn (DE)
Filed by AZUR SPACE Solar Power GmbH, Heilbronn (DE)
Filed on Dec. 22, 2021, as Appl. No. 17/559,656.
Application 17/559,656 is a division of application No. 16/863,585, filed on Apr. 30, 2020, granted, now 11,245,012.
Claims priority of application No. 10 2019 003 069.9 (DE), filed on Apr. 30, 2019.
Prior Publication US 2022/0115501 A1, Apr. 14, 2022
Int. Cl. H01L 29/15 (2006.01); H01L 29/06 (2006.01); H01L 29/205 (2006.01); H01L 29/861 (2006.01)
CPC H01L 29/157 (2013.01) [H01L 29/0619 (2013.01); H01L 29/205 (2013.01); H01L 29/861 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A stacked high barrier III-V power semiconductor diode comprising:
at least a regionally formed first metallic terminal contact layer;
a semiconductor contact region of a first conductivity type with a dopant concentration greater than 1×1018 N/cm3 and with a first lattice constant;
a drift layer of a second conductivity type with the first lattice constant and with a layer thickness greater than 10 microns;
a doped intermediate layer of the first conductivity type with a dopant concentration of less than 5×1018 N/cm3, with the first lattice constant and with a thickness between 1 micron and 30 microns;
a metamorphic buffer layer sequence of the second conductivity type with a layer thickness of more than 0.2 microns and less than 20 microns, the metamorphic buffer layer sequence having an upper side with the first lattice constant and a lower side with a second lattice constant, the upper side being arranged in a direction of the drift layer; and
a second metallic terminal contact layer formed below the lower side of the metamorphic buffer layer sequence,
wherein the first lattice constant is greater than the second lattice constant,
wherein the first metallic terminal contact layer, the semiconductor contact region, the drift layer, the intermediate layer, the metamorphic buffer layer sequence, the second metallic terminal contact layer are arranged in the order mentioned, and
wherein at least the semiconductor contact region and the drift layer and the metamorphic buffer layer sequence comprise a III-V compound.