US 11,715,713 B2
Nonvolatile memory device and nonvolatile memory system including the same
Ji Won Kim, Seoul (KR); Jae Ho Ahn, Seoul (KR); Sung-Min Hwang, Hwaseong-si (KR); Joon-Sung Lim, Seongnam-si (KR); and Suk Kang Sung, Seongnam-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Aug. 18, 2021, as Appl. No. 17/405,637.
Claims priority of application No. 10-2020-0129855 (KR), filed on Oct. 8, 2020.
Prior Publication US 2022/0115344 A1, Apr. 14, 2022
Int. Cl. H01L 25/065 (2023.01); H01L 25/18 (2023.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01)
CPC H01L 24/08 (2013.01) [H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A nonvolatile memory device comprising:
a substrate including a first surface and a second surface opposite to the first surface in a first direction;
a common source line on the first surface of the substrate;
a plurality of word lines stacked on the common source line;
a first insulating pattern spaced apart from the plurality of word lines in a second direction crossing the first direction, and in the substrate;
an insulating layer on the second surface of the substrate;
a first contact plug penetrating the first insulating pattern and extending in the first direction;
a second contact plug penetrating the insulating layer, extending in the first direction, and connected to the first contact plug;
an upper bonding metal connected to the first contact plug and connected to a circuit element; and
a first input/output pad connected to the second contact plug and electrically connected to the circuit element.