CPC G06F 9/30036 (2013.01) [G06F 9/3013 (2013.01); G06F 9/30043 (2013.01); G06F 9/30112 (2013.01); G06F 9/345 (2013.01); G06F 9/3552 (2013.01); G06F 9/3555 (2013.01)] | 20 Claims |
1. An apparatus comprising:
processing circuitry to perform vector processing operations; and
an instruction decoder to decode vector instructions to control the processing circuitry to perform the vector processing operations specified by the vector instructions, the vector instructions including a vector generating instruction identifying a scalar start value, vector element value wrapping control information providing size information indicative of a first bound, and an adjust amount;
wherein the instruction decoder is responsive to the vector generating instruction to control the processing circuitry to generate, based on the scalar start value and the vector element value wrapping control information, a vector comprising a plurality of elements, the processing circuitry being arranged to generate the vector such that the first element in said plurality is dependent on the scalar start value, and the values of the plurality of elements follow a regularly progressing sequence that is constrained to wrap as required to ensure that each value specified by the plurality of elements of the vector is within bounds comprising the first bound identified by the vector element value wrapping control information and a predetermined second bound;
wherein the processing circuitry is configured to determine, based on the adjust amount, a difference between values of adjacent elements in the regularly progressing sequence; and
wherein for each element in the vector other than the first element, the processing circuitry is configured to determine, based on the vector element value wrapping control information, whether a wrap condition is present, and to generate that element based on whether the wrap condition is present.
|