US 10,368,439 B2
Assembly architecture employing organic support for compact and improved assembly throughput
Adel A. Elsherbini, Chandler, AZ (US); Aleksandar Aleksov, Chandler, AZ (US); Sasha N. Oster, Chandler, AZ (US); and Shawna M. Liff, Scottsdale, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 14/778,027
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Dec. 26, 2014, PCT No. PCT/US2014/072446
§ 371(c)(1), (2) Date Sep. 17, 2015,
PCT Pub. No. WO2016/105435, PCT Pub. Date Jun. 30, 2016.
Prior Publication US 2016/0360618 A1, Dec. 8, 2016
Int. Cl. H05K 7/00 (2006.01); H05K 1/11 (2006.01); H05K 1/14 (2006.01); H05K 1/18 (2006.01); H05K 3/30 (2006.01); H05K 3/36 (2006.01); H01L 25/16 (2006.01); H01L 23/58 (2006.01); H05K 1/02 (2006.01)
CPC H05K 1/115 (2013.01) [H01L 23/58 (2013.01); H01L 25/16 (2013.01); H05K 1/0284 (2013.01); H05K 1/0286 (2013.01); H05K 1/144 (2013.01); H05K 1/181 (2013.01); H05K 3/303 (2013.01); H05K 3/368 (2013.01); H01L 2924/0002 (2013.01); H05K 2201/042 (2013.01); H05K 2201/09609 (2013.01); H05K 2201/09636 (2013.01); H05K 2201/09963 (2013.01); H05K 2201/10037 (2013.01); H05K 2201/10128 (2013.01); H05K 2201/10378 (2013.01); H05K 2201/10545 (2013.01); H05K 2201/10583 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An apparatus comprising:
a substrate comprising a first side and an opposite second side;
at least one first circuit device on the first side of the substrate, at least one second circuit device on the second side of the substrate; and
a support on the second side of the substrate, the support comprising a plurality of pillars, each of the pillars having a two-dimensional array of interconnections therethrough, wherein two or more of the pillars have a different shape from one another, and wherein the interconnections are coupled to first contact pads on a first side of the support and second contact pads on an opposite second side of the support and wherein the first contact pads are coupled to substrate contact pads on the second side of the substrate, respective ones of the interconnections are coupled to the at least one first circuit device and the at least one second circuit device, the support having a thickness dimension operable to define a dimension from the substrate greater than a thickness dimension of the at least one second circuit device.