US 11,709,776 B2
Methods and systems for a stripe mode cache pool
Changqi Yang, Dublin, CA (US)
Assigned to Pensando Systems Inc., Milpitas, CA (US)
Filed by Pensando Systems Inc., Milpitas, CA (US)
Filed on Mar. 29, 2021, as Appl. No. 17/216,447.
Prior Publication US 2022/0309002 A1, Sep. 29, 2022
Int. Cl. G06F 12/08 (2016.01); G06F 12/02 (2006.01); G06F 12/0864 (2016.01); G06F 12/0811 (2016.01); G06F 12/084 (2016.01)
CPC G06F 12/0864 (2013.01) [G06F 12/0238 (2013.01); G06F 12/084 (2013.01); G06F 12/0811 (2013.01); G06F 2212/1021 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method implemented by a cache control circuit operatively coupled to an N-way associative cache circuit, the method including:
configuring a plurality of sets of the N-way associative cache circuit as a plurality of stripe mode cache pools that are N-way associative;
receiving a physical address for a memory location that includes
a tag field that contains a tag value and a set field that contains a set value;
using the physical address to determine a pool value that identifies one of the stripe mode cache pools;
using the set value and the pool value to identify one of the sets of the N-way associative cache circuit that is in the one of the stripe mode cache pools; and
concurrently searching the one of the sets in the one of the stripe mode cache pools for the tag value,
wherein
the one of the stripe mode cache pools is N-way associative, and
the one of the stripe mode cache pools includes a plurality of the sets.