CPC G06F 11/0793 (2013.01) [G06F 11/0727 (2013.01); G06F 11/0751 (2013.01)] | 19 Claims |
1. A system comprising:
a memory device; and
a processing device, operatively coupled to the memory device, to perform operations comprising:
detecting a read error with respect to data residing in a block of the memory device, wherein the block is associated with a voltage offset bin;
determining an ordered set of error-handling operations to be performed to the data;
determining a most recently performed error-handling operation associated with the voltage offset bin, wherein the most recently performed error-handling operation is an error-handling operation that has successfully recovered data associated with a previous read error that occurred to a block associated with the voltage offset bin;
adjusting an order of the set of error-handling operations by positioning the most recently performed error-handling operation within a predetermined position in the order of the set of error-handling operations; and
performing one or more error-handling operations of the set of error-handling operations in the adjusted order until data associated to the read error is recovered.
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