US 11,709,412 B2
Method and apparatus for driving static images and video for TIR-based image displays
Vivek Porush, Milpitas, CA (US); Thomas Johansson, Coquitlam (CA); Graham Beales, Vancouver (CA); and Peter T. Kazlas, Sudbury, MA (US)
Assigned to WUXI CLEARINK LIMITED, Wuxi (CN)
Appl. No. 16/616,352
Filed by WUXI CLEARINK LIMITED, Wuxi (CN)
PCT Filed May 23, 2018, PCT No. PCT/US2018/034212
§ 371(c)(1), (2) Date Nov. 22, 2019,
PCT Pub. No. WO2018/217939, PCT Pub. Date Nov. 29, 2018.
Claims priority of provisional application 62/510,272, filed on May 24, 2017.
Prior Publication US 2020/0159085 A1, May 21, 2020
Int. Cl. G02F 1/315 (2006.01); G02F 1/19 (2019.01); G02F 1/1681 (2019.01)
CPC G02F 1/315 (2013.01) [G02F 1/1681 (2019.01); G02F 1/195 (2013.01)] 8 Claims
OG exemplary drawing
 
1. A Total Internal Reflective (TIR) display configured for static and dynamic data display, the display comprising:
a host processor to process image data from a native format to a TIR-suitable format;
a display controller in communication with the host processor, the display controller configured to receive the processed image data from the host processor, the display controller further comprising:
a first frame buffer to store data for a current frame,
a second frame buffer to store data for at least one of a previous or a subsequent frame,
a control logic, and
a look up table (LUT) to store a plurality of waveform corresponding to each of a plurality of image display requirements; and
a display panel having an opposing electrode pair and a plurality of electrophoretically mobile particles disposed in a medium bound by the opposing electrode pair, the plurality of electrophoretically mobile particles configured to move proximal to one of the electrodes in the electrode pair to at least one of totally internally reflect an incoming ray of light or to frustrate the incoming ray of light; and
wherein the display controller is configured to apply at least one waveform to display one of a static or dynamic image, and
wherein one or more of the host processor and the display controller are further configured to:
(a) control and update frame rate and display timing,
(b) display update procedures for partial updates, full updates of either the first frame buffer or the second frame buffer, and rendering pixel data,
(c) interface to a driver integrated circuitry (IC) or a discrete circuitry to generate and control a drive voltage on the display panel,
(d) interface with an ambient sensor to determine an environmental condition and to adapt waveform updates, and
(e) process algorithms to display a color image and/or video data to accommodate color filter arrays (CFAs) of the display.