US 11,706,020 B2
Circuit and method for overcoming memory bottleneck of ASIC-resistant cryptographic algorithms
Toan-Earl Mai, Stouffville (CA)
Assigned to ePIC Blockchain Technologies Inc., Toronto (CA)
Filed by ePIC Blockchain Technologies Inc., Toronto (CA)
Filed on May 3, 2022, as Appl. No. 17/735,697.
Application 17/735,697 is a continuation of application No. 16/235,734, filed on Dec. 28, 2018, granted, now 11,349,639.
Prior Publication US 2022/0263648 A1, Aug. 18, 2022
Int. Cl. H04L 9/06 (2006.01); G06F 16/901 (2019.01); G06F 12/14 (2006.01); H04L 9/14 (2006.01)
CPC H04L 9/0643 (2013.01) [G06F 12/1408 (2013.01); G06F 16/9024 (2019.01); H04L 9/14 (2013.01); G06F 2212/1052 (2013.01); H04L 2209/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An application-specific integrated circuit (ASIC) for executing an Equihash algorithm, comprising:
at least one Blake2B core; and
a processor configured to:
execute one or more steps of the Equihash algorithm; and
send a request to the at least one Blake2B core for generated data comprising one or more of the following: Blake2B data, string data, and XOR data;
the at least one Blake2B core being configured to, in response to receiving the request from the processor:
process a header and a nonce value by applying a Blake2B hash to generate the Blake2B data;
process the Blake2B data to generate the string data;
process the string data by applying XOR operations to generate the XOR data; and
return the generated data to the processor.