US 11,705,972 B2
Pooled memory system enabled by monolithic in-package optical I/O
Roy Edward Meade, Lafayette, CA (US); Vladimir Stojanovic, Berkeley, CA (US); Chen Sun, Berkeley, CA (US); Mark Wade, Berkeley, CA (US); Hugo Saleh, Tuscaloosa, AL (US); and Charles Wuischpard, Danville, CA (US)
Assigned to Ayar Labs, Inc., Santa Clara, CA (US)
Filed by Ayar Labs, Inc., Santa Clara, CA (US)
Filed on Jan. 25, 2022, as Appl. No. 17/583,967.
Application 17/583,967 is a continuation of application No. 17/175,678, filed on Feb. 14, 2021, granted, now 11,233,580, issued on Jan. 25, 2022.
Claims priority of provisional application 63/127,116, filed on Dec. 17, 2020.
Claims priority of provisional application 62/977,047, filed on Feb. 14, 2020.
Prior Publication US 2022/0148627 A1, May 12, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 5/04 (2006.01); G11C 5/06 (2006.01); G11C 5/14 (2006.01); G11C 11/42 (2006.01); H04B 10/80 (2013.01); H04B 10/516 (2013.01); G02B 6/42 (2006.01)
CPC H04B 10/80 (2013.01) [G02B 6/4249 (2013.01); G02B 6/4274 (2013.01); G11C 5/04 (2013.01); G11C 5/06 (2013.01); G11C 5/141 (2013.01); G11C 11/42 (2013.01); H04B 10/516 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A computer memory system, comprising:
a plurality of memory devices;
an electro-optical chip including an electrical interface and a photonic interface, the photonic interface configured to optically connect with an optical link, the electro-optical chip including an optical macro, the optical macro configured to convert outgoing electrical data signals received through the electrical interface into outgoing optical data signals, the optical macro configured to transmit the outgoing optical data signals through the photonic interface to the optical link, the optical macro configured to convert incoming optical data signals received through the photonic interface from the optical link into incoming electrical data signals, the optical macro configured to transmit the incoming electrical data signals through the electrical interface, wherein the optical macro includes a transmitter slice that includes an optical microring resonator configured to modulate light signals of a particular wavelength in accordance with electrical data signals, and wherein the optical macro includes a receiver slice that includes another optical microring resonator configured to optically in-couple light signals of another particular wavelength; and
an electrical circuit configured to direct transmission of data communication signals between the electrical interface of the electro-optical chip and each of the plurality of memory devices.