US 11,705,197 B2
Modified write voltage for memory devices
Sandeepan Dasgupta, Albuquerque, NM (US); Sanjay Rangan, Albuquerque, NM (US); Koushik Banerjee, Milpitas, CA (US); Nevil Gajera, Meridian, ID (US); Mase J. Taub, Folsom, CA (US); and Kiran Pangal, Fremont, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 14, 2021, as Appl. No. 17/501,553.
Application 17/501,553 is a continuation of application No. 16/809,453, filed on Mar. 4, 2020, granted, now 11,170,853.
Prior Publication US 2022/0068385 A1, Mar. 3, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 7/10 (2006.01); G11C 13/00 (2006.01)
CPC G11C 13/0069 (2013.01) [G11C 13/003 (2013.01); G11C 13/004 (2013.01); G11C 13/0061 (2013.01); G11C 2013/0078 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a write command indicating a set of data to be written to a plurality of memory cells; and
performing a write operation based at least in part on the write command, wherein performing the write operation comprises applying a first write signal to a first set of memory cells of the plurality of memory cells that are to be switched from a first logic state to a second logic state as a result of the write command and have a characteristic that does not satisfy a threshold, and applying a second write signal to a second set of memory cells of the plurality of memory cells that are to be switched from the first logic state to the second logic state as a result of the write command and have the characteristic satisfying the threshold.