CPC G11C 13/004 (2013.01) [G11C 13/003 (2013.01); G11C 13/0069 (2013.01); G11C 2213/15 (2013.01)] | 20 Claims |
1. An apparatus, comprising:
a memory having a plurality of memory cells; and
circuitry configured to increase a magnitude of a current used to sense a data state of the memory cells upon a quantity of program operations performed on the memory cells reaching a threshold quantity.
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