CPC G11C 8/06 (2013.01) [H03M 7/16 (2013.01); H03M 13/138 (2013.01); H03M 13/1575 (2013.01)] | 18 Claims |
1. An apparatus, comprising:
a memory unit; and
a controller coupled to the memory unit, the controller configured to:
convert a sets of physical address bits having a natural binary code format to a reduced Hamming distance binary code format;
access a first portion of the memory unit using a first set of physical address bits having the natural binary code format; and
access a second portion of the memory unit using a second set of physical address bits having the reduced Hamming distance binary code format, wherein the reduced Hamming distance binary code format involves a reduced number of toggles in accessing the memory unit than using the natural binary code format.
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