CPC G06F 12/0246 (2013.01) [G06F 12/0292 (2013.01); G06F 12/0804 (2013.01); G06F 12/0882 (2013.01); G06F 2212/7201 (2013.01)] | 16 Claims |
1. A storage system comprising:
a non-volatile memory;
a volatile memory;
an interface configured to communicate with a host comprising a host memory buffer; and
a controller configured to:
receive, from the host, a memory access command comprising a logical address;
read, from the non-volatile memory, a logical-to-physical address table that contains the logical address received from the host;
predict a likelihood that an update will be made to the logical-to-physical address table;
in response to the likelihood being above a threshold, store the logical-to-physical address table in the volatile memory and use the logical-to-physical address table: stored in the volatile memory to translate the logical address received from the host to a physical address in the non-volatile memory; and
in response to the likelihood not being above the threshold:
store the logical-to-physical address table in the host memory buffer and use the logical-to-physical address table stored in the host memory buffer to translate the logical address received from the host to the physical address in the non-volatile memory;
update the logical-to-physical address table after it has been stored in the host memory buffer;
receive the updated logical-to-physical address table from the host memory buffer;
store the updated logical-to-physical address table in the volatile memory; and
perform a consolidation process using the updated logical-to-physical address table.
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