CPC G06F 9/4893 (2013.01) [G06F 16/9024 (2019.01); G06Q 20/145 (2013.01); G06F 2209/486 (2013.01)] | 20 Claims |
1. A computer-implemented method comprising:
receiving a directed acyclic graph at a meta pre-processor associated with a heterogeneous system on a chip (SoC) and communicatively coupled to a scheduler, wherein the directed acyclic graph corresponds to a control flow graph of tasks associated with an application executed by the heterogeneous SoC;
determining a rank for a respective task in the directed acyclic graph, wherein the rank is based on a priority of the respective task and a slack in the directed acyclic graph;
providing the respective task to the scheduler for execution on the heterogeneous SoC according to the rank;
executing, by the heterogenous SoC, the respective task according to the rank;
determining that respective priorities of additional tasks in the directed acyclic graph are non-critical;
determining that an updated slack in the directed acyclic graph is negative;
canceling the additional tasks in the directed acyclic graph; and
proceeding to a next directed acyclic graph.
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