CPC G06F 9/4881 (2013.01) [G06F 9/5038 (2013.01)] | 20 Claims |
1. A method for scheduling tasks on a processor, the method comprising:
writing a plurality of status bits in a hardware logic of the processor, the plurality of status bits corresponding to conditions of a plurality of computer components;
comparing the plurality of status bits to a set of conditions required by the plurality of computer components to execute a plurality of tasks;
determining, based on the comparison, a subset of the plurality of tasks that can be executed next on the processor; and
executing, by the plurality of computer components, the subset of the plurality of tasks.
|