US 11,704,152 B2
Processor zero overhead task scheduling
Julien Margetts, Thame (GB)
Assigned to Kioxia Corporation, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Apr. 16, 2021, as Appl. No. 17/232,332.
Application 17/232,332 is a continuation of application No. 16/354,559, filed on Mar. 15, 2019, granted, now 10,996,981.
Prior Publication US 2021/0232430 A1, Jul. 29, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/48 (2006.01); G06F 9/50 (2006.01)
CPC G06F 9/4881 (2013.01) [G06F 9/5038 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for scheduling tasks on a processor, the method comprising:
writing a plurality of status bits in a hardware logic of the processor, the plurality of status bits corresponding to conditions of a plurality of computer components;
comparing the plurality of status bits to a set of conditions required by the plurality of computer components to execute a plurality of tasks;
determining, based on the comparison, a subset of the plurality of tasks that can be executed next on the processor; and
executing, by the plurality of computer components, the subset of the plurality of tasks.