CPC G06F 3/0655 (2013.01) [G06F 1/06 (2013.01); G06F 3/061 (2013.01); G06F 3/0679 (2013.01); G11C 7/1066 (2013.01)] | 18 Claims |
1. A data storage apparatus for storing data under control by a memory controller of a separate host device, comprising:
a memory device including memory cells for storing data; and an interface circuit coupled as an interface between the host device and the memory device and configured to transmit a transmission signal to the host,
wherein the interface circuit includes a delay circuit configured to generate a delay code; and
a pre-emphasis circuit configured to generate an additional signal by delaying the transmission signal by a delay time determined based on the delay code, and to combine the transmission signal and the additional signal.
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