US 11,704,046 B2
Quick clearing of registers
Timothy David Anderson, University Park, TX (US); Duc Quang Bui, Grand Prairie, TX (US); and Soujanya Narnur, Austin, TX (US)
Assigned to Texas Instruments Incorporated, Dallas, TX (US)
Filed by TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed on Apr. 18, 2022, as Appl. No. 17/722,477.
Application 17/722,477 is a continuation of application No. 16/422,522, filed on May 24, 2019, granted, now 11,307,791.
Prior Publication US 2022/0244880 A1, Aug. 4, 2022
Int. Cl. G06F 3/06 (2006.01); G06F 13/16 (2006.01); G06F 15/80 (2006.01)
CPC G06F 3/0652 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G06F 13/1668 (2013.01); G06F 15/8076 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A device comprising:
a set of functional units that each include a data output and a write enable output;
a set of logic that includes:
a set of write enable inputs coupled to the write enable outputs of the set of functional units;
a set of data inputs coupled to the data outputs of the set of functional units; and
a data output configured to provide a signal based on the set of write enable inputs and the set of data inputs; and
a register that includes a data input coupled to the data output of the set of logic, wherein the set of functional units is configured to, in response to a register clear instruction, cause each functional unit of the set of functional units to provide a respective write enable signal at the respective write enable output that specifies not to write to the register.