US 11,703,937 B2
Device and method for efficient transitioning to and from reduced power state
Mihir Shaileshbhai Doctor, Santa Clara, CA (US); Alexander J. Branover, Boxborough, MA (US); Benjamin Tsien, Santa Clara, CA (US); Indrani Paul, Austin, TX (US); Christopher T. Weaver, Boxborough, MA (US); Thomas J. Gibney, Boxborough, MA (US); Stephen V. Kosonocky, Fort Collins, CO (US); and John P. Petry, San Diego, CA (US)
Assigned to Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on Sep. 23, 2021, as Appl. No. 17/483,698.
Prior Publication US 2023/0101640 A1, Mar. 30, 2023
Int. Cl. G06F 1/32 (2019.01); G06F 1/3287 (2019.01); G06F 1/3296 (2019.01); G06F 1/3234 (2019.01)
CPC G06F 1/3287 (2013.01) [G06F 1/3265 (2013.01); G06F 1/3278 (2013.01); G06F 1/3296 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A processing device comprising:
a plurality of components having assigned registers used to store data to execute a program; and
a power management controller, in communication with the components, and configured to:
send one of a request to remove power to the components and a request to reduce power to the components when it is determined that the components are idle;
execute a first process of one of removing power and reducing power to the components and entering a reduced power state when an acknowledgement of the request is received; and
execute a second process of restoring power to the components when one or more of the components are indicated to be active.