US 11,696,409 B2
Vertical embedded component in a printed circuit board blind hole
Tin Poay Chuah, Banyan Lepas (MY); Min Suet Lim, Bayan Lepas (MY); Hoay Tien Teoh, Paya Terubong (MY); Mooi Ling Chang, Bayan Baru (MY); and Chin Lee Kuan, Bayan Lepas (MY)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 16/325,659
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Sep. 30, 2016, PCT No. PCT/US2016/054643
§ 371(c)(1), (2) Date Feb. 14, 2019,
PCT Pub. No. WO2018/063279, PCT Pub. Date Apr. 5, 2018.
Prior Publication US 2019/0208643 A1, Jul. 4, 2019
Int. Cl. H05K 1/18 (2006.01); H05K 1/11 (2006.01); H05K 1/16 (2006.01)
CPC H05K 1/184 (2013.01) [H05K 1/111 (2013.01); H05K 1/113 (2013.01); H05K 1/16 (2013.01); H05K 1/162 (2013.01); H05K 1/165 (2013.01); H05K 1/167 (2013.01); H05K 1/183 (2013.01); H05K 2201/0305 (2013.01); H05K 2201/09072 (2013.01); H05K 2201/10454 (2013.01)] 14 Claims
OG exemplary drawing
 
1. A printed circuit board (PCB) comprising:
a blind via in a layer of the PCB, the layer of the PCB having an uppermost surface;
a discrete component vertically embedded within the blind via;
a solder paste pad on the discrete component, the solder paste pad extending laterally beyond the blind via, wherein a portion of the solder paste pad is vertically overlapping with the uppermost surface of the layer of the PCB; and
a stencil on the uppermost surface of the layer of the PCB, the stencil laterally surrounding and in lateral contact with the solder paste pad, wherein the discrete component is vertically embedded under a ball grid array coupling the PCB to an integrated circuit (IC) package, and wherein a solder ball of the ball grid array is vertically over and coupled to the discrete component by the solder paste pad.