CPC H04L 25/03114 (2013.01) [H04L 25/028 (2013.01); H04L 25/0272 (2013.01); H04L 25/4925 (2013.01); H04L 2025/03363 (2013.01)] | 14 Claims |
1. A multi-level signal transmitter comprising:
an encoder figured to receive an input data and output a plurality of logical signal sets, each of said plurality of logical signal sets comprising a plurality of logical signals; and
a plurality of tree-structured drivers configured to receive said plurality of logical signal sets, respectively, and jointly establish an output voltage at an output node, wherein each of said tree-structure drivers comprises a plurality of inverters configured to receive said plurality of logical signals of its respective logical signal set and jointly establish a joint voltage at a bifurcation node via coupling to the bifurcation node through a plurality of first-level weighting resistors, and a second-level weighting resistor configured to couple the bifurcation node to the output node.
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