US 11,695,426 B1
SAR ADC and related method
Jemm Yue Liang, Sunnyvale, CA (US); and Hsi-Sheng Chen, Fremont, CA (US)
Assigned to xMEMS Labs, Inc., Santa Clara, CA (US)
Filed by xMEMS Labs, Inc., Santa Clara, CA (US)
Filed on Feb. 21, 2023, as Appl. No. 18/171,687.
Claims priority of provisional application 63/339,394, filed on May 6, 2022.
Claims priority of provisional application 63/325,615, filed on Mar. 31, 2022.
Int. Cl. H03M 1/38 (2006.01)
CPC H03M 1/38 (2013.01) 20 Claims
OG exemplary drawing
 
1. A successive approximation register (SAR) analog-to-digital converter (ADC) comprising:
a comparator, a threshold generator and a controller;
wherein the comparator receives an analog signal and the SAR ADC outputs an output codeword;
wherein the comparator performs a plurality of first comparisons and a plurality of second comparisons;
wherein the controller determines a plurality of most significant bits of the output codeword according to a plurality of first comparison results corresponding to the plurality of first comparisons;
wherein the plurality of first comparisons are performed by comparing the analog signal with a plurality of first thresholds;
wherein the controller determines a plurality of least significant bits of the output codeword according to a plurality of second comparison results corresponding to the plurality of second comparisons;
wherein the plurality of second comparisons are performed by comparing the analog signal with a second threshold;
wherein the controller controls the threshold generator to produce the plurality of first thresholds and the second threshold according to the plurality of first comparison results.