CPC H03K 17/6872 (2013.01) [G06F 30/392 (2020.01); H03K 19/017509 (2013.01)] | 20 Claims |
1. A method of generating multiple gating signals for a multi-gated input/output (I/O) system that includes an output level shifter and an output driver which are coupled in series between an output node of a core circuit and an external terminal of a corresponding system, the method comprising:
generating first and second gating signals having corresponding first and second waveforms, the first and second waveforms being free from relating as waveform-inversions of each other, and the first waveform transitioning from a non-enabling state to an enabling state before the second waveform transitions from the non-enabling state to the enabling state;
receiving the first gating signal at the output level shifter; and
receiving the second gating signal at the output driver.
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