US 11,695,037 B2
Semiconductor structure
Ju-Hsien Lin, Taoyuan (TW); Jung-Tao Chung, Taoyuan (TW); Shu-Hsiao Tsai, Taoyuan (TW); Hsi-Tsung Lin, Taoyuan (TW); Chen-An Hsieh, Taoyuan (TW); Yi-Han Chen, Taoyuan (TW); and Yao-Ting Shao, Taoyuan (TW)
Assigned to WIN SEMICONDUCTORS CORP., Taoyuan (TW)
Filed by WIN SEMICONDUCTORS CORP., Taoyuan (TW)
Filed on Jan. 12, 2021, as Appl. No. 17/146,936.
Prior Publication US 2022/0223685 A1, Jul. 14, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 27/06 (2006.01); H01L 29/417 (2006.01)
CPC H01L 29/0649 (2013.01) [H01L 27/0635 (2013.01); H01L 29/41775 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor structure, comprising:
a substrate;
an active device disposed over the substrate and in a first region of the substrate;
a passive device disposed over the substrate and in a second region of the substrate; and
a passivation layer covering a top surface of the passive device, wherein the passivation layer has an opening that exposes the active device.