US 11,694,964 B2
Flexible circuit board and chip package including same
Jun Young Lim, Seoul (KR); Hyung Kyu Yoon, Seoul (KR); and Sung Min Chae, Seoul (KR)
Assigned to LG INNOTEK CO., LTD., Seoul (KR)
Filed by LG INNOTEK CO., LTD., Seoul (KR)
Filed on Dec. 22, 2021, as Appl. No. 17/559,125.
Application 17/559,125 is a continuation of application No. 16/756,552, granted, now 11,239,172, previously published as PCT/KR2018/012687, filed on Oct. 25, 2018.
Claims priority of application No. 10-2017-0145443 (KR), filed on Nov. 2, 2017.
Prior Publication US 2022/0148976 A1, May 12, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/48 (2006.01); H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/16 (2023.01); H01L 25/18 (2023.01)
CPC H01L 23/5387 (2013.01) [H01L 23/49866 (2013.01); H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 25/16 (2013.01); H01L 25/18 (2013.01); H01L 2224/16227 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A flexible circuit board comprising:
a substrate;
a first conductive pattern part disposed on a first surface of the substrate;
a second conductive pattern part disposed on a second surface opposite to the first surface of the substrate;
a first dummy pattern part disposed in a region of the second surface of the substrate in which the second conductive pattern part is not disposed;
a first protection layer disposed on the first conductive pattern part; and
a second protection layer disposed on the second conductive pattern part and the first dummy pattern part,
wherein the first conductive pattern part at an outermost periphery of the substrate is covered by the first protection layer, and
wherein the first dummy pattern part includes:
a first wiring pattern layer, and
a first plating layer including tin (Sn) disposed on the first wiring pattern layer.