US 11,694,943 B2
Semiconductor device including heat dissipation structure and fabricating method of the same
Po-Yuan Teng, Hsinchu (TW); Chen-Hua Yu, Hsinchu (TW); Hao-Yi Tsai, Hsinchu (TW); Kuo-Chung Yee, Taoyuan (TW); Tin-Hao Kuo, Hsinchu (TW); and Shih-Wei Chen, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Nov. 15, 2021, as Appl. No. 17/525,971.
Application 17/525,971 is a continuation of application No. 16/533,789, filed on Aug. 7, 2019, granted, now 11,177,192.
Claims priority of provisional application 62/737,859, filed on Sep. 27, 2018.
Prior Publication US 2022/0077024 A1, Mar. 10, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/473 (2006.01); H01L 23/31 (2006.01); H01L 23/40 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 21/683 (2006.01)
CPC H01L 23/473 (2013.01) [H01L 21/4857 (2013.01); H01L 21/4882 (2013.01); H01L 21/568 (2013.01); H01L 21/6835 (2013.01); H01L 23/3121 (2013.01); H01L 23/4006 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 2023/4018 (2013.01); H01L 2023/4068 (2013.01); H01L 2023/4087 (2013.01); H01L 2221/68359 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a chip package comprising a semiconductor die laterally encapsulated by an insulating encapsulant, the semiconductor die comprising a thermal enhancement pattern; and
a heat dissipation structure connected to the chip package, the heat dissipation structure comprising a heat spreader comprising a flow channel and a cooling liquid in the flow channel, and the cooling liquid in the flow channel being in contact with the thermal enhancement pattern, wherein outer sidewalls of the heat spreader are substantially aligned with outer sidewalls of the insulating encapsulant.