CPC G09G 3/3406 (2013.01) [G09G 2310/08 (2013.01); G09G 2320/064 (2013.01)] | 21 Claims |
9. A method comprising:
receiving a brightness code having a bit depth corresponding to a baseline resolution for a pulse width modulation system using a first counter clock frequency and a first pulse width modulation (PWM) clock frequency;
dividing the brightness code by a value M using division circuitry to obtain a divided brightness code, wherein the value M is a positive integer;
adding a remainder of the division to the divided brightness code;
comparing the divided brightness code to a count of a counter clock having the first counter clock frequency over a first PWM clock having a second PWM clock frequency equal to the value M times the first PWM clock frequency; and
providing a pulse width modulation PWM signal to cause a light emitting element to emit light during the first PWM clock while the count is lower than the divided brightness code.
|