US 11,694,074 B2
Integrated circuit that extracts data, neural network processor including the integrated circuit, and neural network device
Jun-seok Park, Hwaseong-si (KR); Jin-ook Song, Seongnam-si (KR); Jae-gon Lee, Seongnam-si (KR); and Yun-kyo Cho, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jul. 15, 2019, as Appl. No. 16/511,073.
Claims priority of application No. 10-2018-0107391 (KR), filed on Sep. 7, 2018.
Prior Publication US 2020/0082253 A1, Mar. 12, 2020
Int. Cl. G06F 17/10 (2006.01); G06N 3/08 (2023.01); G06N 3/063 (2023.01); G06N 3/04 (2023.01); G06F 13/16 (2006.01)
CPC G06N 3/08 (2013.01) [G06F 13/1673 (2013.01); G06N 3/04 (2013.01); G06N 3/063 (2013.01)] 9 Claims
OG exemplary drawing
 
1. An integrated circuit included in a device for performing a neural network operation, the integrated circuit comprising:
a buffer configured to store feature map data in units of cells each comprising at least one feature, each of the at least one feature of each cell corresponding to a coordinate value, wherein the feature map data is for use in the neural network operation; and
a multiplexing circuit including at least one multiplexer, the multiplexing circuit being configured to
receive the feature map data from the buffer,
extract feature data from each cell, the at least one multiplexer being configured to extract each of the at least one feature of each cell corresponding to an identical coordinate value, and
output the extracted feature data.