US 11,693,970 B2
Method and system for managing memory of data processing accelerators
Yong Liu, Sunnyvale, CA (US); Yueqiang Cheng, Sunnyvale, CA (US); Jian Ouyang, Beijing (CN); and Tao Wei, Sunnyvale, CA (US)
Assigned to BAIDU USA LLC, Sunnyvale, CA (US); BAIDU.COM TIMES TECHNOLOGY (BEIJING) CO., LTD., Beijing (CN); and KUNLUNXIN TECHNOLOGY (BEIIING) COMPANY LIMITED, Beijing (CN)
Appl. No. 16/315,957
Filed by Baidu USA LLC, Sunnyvale, CA (US); Baidu.com Times Technology (Beijing) Co., Ltd., Beijing (CN); and KUNLUNXIN TECHNOLOGY (BEIJING) COMPANY LIMITED, Beijing (CN)
PCT Filed Jan. 4, 2019, PCT No. PCT/CN2019/070416
§ 371(c)(1), (2) Date Jan. 7, 2019,
PCT Pub. No. WO2020/140269, PCT Pub. Date Jul. 9, 2020.
Prior Publication US 2021/0173934 A1, Jun. 10, 2021
Int. Cl. G06F 21/57 (2013.01); G06F 9/50 (2006.01); G06F 21/53 (2013.01)
CPC G06F 21/575 (2013.01) [G06F 9/5027 (2013.01); G06F 21/53 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A computer-implemented method for memory management, the method comprising:
performing a secure boot using a security module of a host system;
establishing a trusted execution environment (TEE) associated with one or more processors of the host system;
launching a memory manager, wherein the memory manager is configured to manage memory resources of a data processing (DP) accelerator coupled to the host system over a bus, including maintaining memory usage information at least by recording, in a memory usage data structure, allocation of memory blocks of a global memory residing within the DP accelerator to one or more applications to map, in the memory data structure, which of the memory blocks are allocated to which of the one or more applications, wherein the memory manager and the memory usage data structure are implemented as a part of a runtime library associated with the DP accelerator and the memory manager and the memory usage data structure are executed within the TEE of the host system; and
in response to a request received from an application running within the TEE for accessing a memory location of the DP accelerator, allowing or denying the request based on the allocation of the global memory residing within the DP accelerator of the memory usage information.