US 11,693,813 B2
Alternative protocol over physical layer
Gordon Caruk, Brampton (CA); Maurice B. Steinman, Marlborough, MA (US); Gerald R. Talbot, Concord, MA (US); and Joseph D. Macri, San Francisco, CA (US)
Assigned to ATI Technologies ULC, Markham (CA); and Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed by ATI Technologies ULC, Markham (CA); and Advanced Micro Devices, Inc., Santa Clara, CA (US)
Filed on May 30, 2019, as Appl. No. 16/427,020.
Application 16/427,020 is a continuation in part of application No. 16/223,873, filed on Dec. 18, 2018, granted, now 10,698,856.
Prior Publication US 2020/0192853 A1, Jun. 18, 2020
Int. Cl. G06F 13/20 (2006.01); G06F 13/42 (2006.01); G06F 13/16 (2006.01)
CPC G06F 13/4282 (2013.01) [G06F 13/1689 (2013.01); G06F 2213/0026 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A link controller comprising:
a Peripheral Component Interconnect Express (PCIe) physical layer circuit coupled to a communication link and providing a data path over said communication link;
a first data link layer controller which operates according to a PCIe protocol;
a second data link layer controller which operates according to a Gen-Z protocol;
a multiplexer-demultiplexer coupled to the first data link layer controller and the PCIe physical layer circuit; and
a protocol translation circuit coupled to the multiplexer-demultiplexer and the second data link layer controller, the protocol translation circuit receiving traffic data from the second data link layer controller in a Gen-Z format, encapsulating the Gen-Z format traffic data in a PCIe format, and passing the encapsulated traffic data to the multiplexer-demultiplexer.