CPC G06F 11/0793 (2013.01) [G06F 1/28 (2013.01); G06F 1/305 (2013.01); G06F 1/324 (2013.01); G06F 9/3836 (2013.01); G06F 11/0721 (2013.01)] | 20 Claims |
1. A system, comprising:
a memory that stores computer executable components; and
a processor that executes the computer executable components stored in the memory, wherein the computer executable components comprise:
an instruction component that:
applies, during a first stage of a processor pipeline, a voltage droop mitigation countermeasure prior to a predicted increase of a level of power to be consumed during a second stage of the processor pipeline;
continues to generate a throttling signal based on a determination that a difference between an amount of noise mitigated and local detected voltage change information fails to be within a defined range; and
stops generation of the throttling signal based on a determination that a difference between an amount of noise mitigated and the local detected voltage change information is within the defined range.
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