CPC G06F 9/3016 (2013.01) [G06F 9/30014 (2013.01); G06F 9/30036 (2013.01); G06F 9/30098 (2013.01); G06F 9/30112 (2013.01); G06F 9/30123 (2013.01); G06F 9/30145 (2013.01); G06F 9/32 (2013.01); G06F 9/345 (2013.01); G06F 9/3802 (2013.01); G06F 9/383 (2013.01); G06F 9/3861 (2013.01); G06F 9/3867 (2013.01); G06F 11/00 (2013.01); G06F 11/1048 (2013.01); G06F 12/0875 (2013.01); G06F 12/0897 (2013.01); G06F 9/3822 (2013.01); G06F 11/10 (2013.01); G06F 2212/452 (2013.01); G06F 2212/60 (2013.01)] | 18 Claims |
1. A circuit device comprising:
a functional unit that includes a set of pipeline stages configured to collectively execute a first instruction;
a local capture queue coupled to the functional unit that includes a set of registers, wherein each register of the set of registers is coupled to a respective stage of the set of pipeline stages to store a respective intermediate result of the first instruction; and
a scoreboard coupled to the functional unit and the local capture queue and configured to:
based on receiving the first instruction, set a lifetime tracking value based on an expected duration of execution of the first instruction;
adjust the lifetime tracking value during the execution of the first instruction by the set of pipeline stages; and
in response to a second instruction, preempt the first instruction by:
causing a first register of the local capture queue to store a first intermediate result of the first instruction from a first stage of the set of pipeline stages; and
based on the second instruction having completed, using the lifetime tracking value to restore the first intermediate result to the set of pipeline stages.
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