US 11,693,587 B2
System driven pass-through voltage adjustment to improve read disturb in memory devices
Sandeep Reddy Kadasani, Meridian, ID (US); Scott Anthony Stoller, Boise, ID (US); Pitamber Shukla, Boise, ID (US); Niccolo' Righetti, Boise, ID (US); and Chi Ming Chu, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Aug. 17, 2021, as Appl. No. 17/404,875.
Prior Publication US 2023/0058645 A1, Feb. 23, 2023
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device coupled to the memory device, the processing device configured to perform operations comprising:
performing a first read operation on the memory device in accordance with a pass-through voltage setting that defines a pass-through voltage applied to one or more cells of the memory device during read operations, the performing of the first read operation comprising applying the pass-through voltage to all word lines in a page of the memory device;
counting a first number of zero bits read from the page of the memory device based on the first read operation;
comparing the first number of zero bits read from the page of the memory device with a threshold number of failing bits, the threshold number of failing bits being based on a page size of the memory device and an expected failure rate of cells of the memory device; and
based on the first number of zero bits read from the page of the memory device exceeding the threshold number of failing bits, increasing the pass-through voltage applied to one or more cells of the memory device during read operations by adjusting the pass-through voltage setting.