US 11,693,052 B2
Using embedded time-varying code generator to provide secure access to embedded content in an on-chip access architecture
James M. Johnson, Buda, TX (US); and Alfred L. Crouch, Cedar Park, TX (US)
Assigned to Silicon Aid Solutions, Inc., Buda, TX (US)
Filed by SiliconAid Solutions, Inc., Buda, TX (US)
Filed on Apr. 17, 2022, as Appl. No. 17/722,361.
Application 16/195,182 is a division of application No. 15/347,753, filed on Nov. 9, 2016, granted, now 10,690,718, issued on Jun. 23, 2020.
Application 17/722,361 is a continuation of application No. 16/195,182, filed on Nov. 19, 2018, granted, now 11,333,706.
Claims priority of provisional application 62/252,763, filed on Nov. 9, 2015.
Prior Publication US 2022/0244311 A1, Aug. 4, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G01R 31/317 (2006.01); G01R 31/3185 (2006.01); G06F 21/79 (2013.01); H04L 9/08 (2006.01)
CPC G01R 31/31719 (2013.01) [G01R 31/318588 (2013.01); G06F 21/79 (2013.01); H04L 9/0861 (2013.01); H04L 2209/12 (2013.01)] 11 Claims
OG exemplary drawing
 
1. An integrated circuit comprising:
a serial scan path comprising:
a Segment-Insertion-Bit (SIB) circuit adapted to:
receive a clock signal;
receive a serial input data signal;
receive an unlock signal; and
develop a first seral data out signal;
a first shift register of a first length adapted to:
receive said first serial data out signal;
receive said clock signal; and
develop a first output data as a function of said first serial data out signal and said clock signal; and
a second shift register adapted to:
receive a select signal;
receive said first serial data out signal;
receive said clock signal; and
develop a second serial data out signal if said select signal is asserted;
said SIB circuit being further adapted to:
receive a scan enable signal;
receive an update enable signal;
receive said second serial data out signal;
receive said unlock signal;
develop said select signal as a function of said clock signal, said serial input data signal, said scan enable signal, said update enable signal, and said unlock signal;
develop said first serial data out signal as a function of said clock signal, said serial input data signal, and said scan enable signal;
develop an assert value on said select signal as a function of said clock signal, said serial input data signal, said scan enable signal, said update enable signal if said unlock signal is asserted; and
develop a de-assert value on said select signal if said unlock signal is de-asserted;
develop said first serial data out signal as a function of:
said clock signal, said serial input data signal, said second serial data out signal, and said scan enable signal if said select signal is asserted; and
said clock signal, said serial input data signal, and said scan enable signal if said select signal is de-asserted.