US 11,693,025 B2
Testing apparatus and method of using the same
Jian-Ting Chen, Hsinchu County (TW); Cheng-Han Huang, Hsinchu (TW); and Kuang-Hua Wang, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 30, 2021, as Appl. No. 17/461,967.
Prior Publication US 2023/0067209 A1, Mar. 2, 2023
Int. Cl. G01R 1/02 (2006.01); G01R 1/04 (2006.01); G01R 1/067 (2006.01); G01R 1/073 (2006.01); G01R 1/20 (2006.01); G01R 31/20 (2006.01); G01R 31/26 (2020.01); H01R 12/70 (2011.01)
CPC G01R 1/0433 (2013.01) [H01R 12/7076 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A testing apparatus for a semiconductor package, comprising:
a circuit board, having a testing region and comprising a plurality of testing contacts and a plurality of signal contacts distributed in the testing region;
testing patterns, embedded in the circuit board and electrically connected to the testing contacts, wherein each of the testing patterns comprises:
a first conductive line; and
a second conductive line, comprising a main portion and a branch portion connected to main portion, wherein the first conductive line is connected to the main portion; and
a socket, located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.