US 11,691,147 B2
Digital microfluidic chip and digital microfluidic system
Mingyang Lv, Beijing (CN); Yue Li, Beijing (CN); Yanchen Li, Beijing (CN); Jinyu Li, Beijing (CN); Dawei Feng, Beijing (CN); Yu Zhao, Beijing (CN); Dong Wang, Beijing (CN); Wang Guo, Beijing (CN); Hailong Wang, Beijing (CN); Yue Geng, Beijing (CN); Peizhi Cai, Beijing (CN); Fengchun Pang, Beijing (CN); Le Gu, Beijing (CN); Chuncheng Che, Beijing (CN); Haochen Cui, Beijing (CN); Yingying Zhao, Beijing (CN); Nan Zhao, Beijing (CN); Yuelei Xiao, Beijing (CN); and Hui Liao, Beijing (CN)
Assigned to Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
Appl. No. 16/641,126
Filed by Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE Technology Group Co., Ltd., Beijing (CN)
PCT Filed Jul. 26, 2019, PCT No. PCT/CN2019/097899
§ 371(c)(1), (2) Date Feb. 21, 2020,
PCT Pub. No. WO2020/020344, PCT Pub. Date Jan. 30, 2020.
Claims priority of application No. 201810842202.9 (CN), filed on Jul. 27, 2018.
Prior Publication US 2020/0171491 A1, Jun. 4, 2020
This patent is subject to a terminal disclaimer.
Int. Cl. B01L 3/00 (2006.01)
CPC B01L 3/50273 (2013.01) [B01L 3/502792 (2013.01); B01L 2200/10 (2013.01); B01L 2300/0645 (2013.01); B01L 2300/165 (2013.01); B01L 2400/0427 (2013.01)] 11 Claims
 
1. A digital microfluidic chip, comprising:
an upper substrate and a lower substrate disposed oppositely;
a first hydrophobic layer disposed on a side surface of the lower substrate facing the upper substrate;
a second hydrophobic layer disposed on a side surface of the upper substrate facing the lower substrate, with a space between the first hydrophobic layer and the second hydrophobic layer forming a droplet accommodation space; and
a plurality of drive circuits and a plurality of addressing circuits, located between the lower substrate and the upper substrate,
wherein one of the plurality of addressing circuits corresponds to at least one of the plurality of drive circuits;
wherein each of the drive circuits comprises a driving electrode located between the lower substrate and the first hydrophobic layer, and a reference electrode located between the upper substrate and the second hydrophobic layer;
wherein each of the addressing circuits comprises a bottom electrode, a photoelectric conversion layer and a top electrode disposed in a stacked manner between the lower substrate and the first hydrophobic layer, wherein the bottom electrode is closer to the lower substrate than the top electrode, and the top electrode is a transparent electrode;
wherein a layer where the top electrode is located and the layer where the driving electrodes are located are a same film layer.