US 10,342,037 B2
Radio receiver and method for processing an uplink transport block
Thomas Fliess, Dresden (DE)
Assigned to Intel IP Corporation, Santa Clara, CA (US)
Filed by Intel IP Corporation, Santa Clara, CA (US)
Filed on Aug. 16, 2016, as Appl. No. 15/238,242.
Claims priority of application No. 10 2015 115 754 (DE), filed on Sep. 18, 2015.
Prior Publication US 2017/0086171 A1, Mar. 23, 2017
Int. Cl. H04W 52/14 (2009.01); H04W 72/04 (2009.01); H04L 1/00 (2006.01); H04W 72/12 (2009.01); H04W 72/14 (2009.01)
CPC H04W 72/1289 (2013.01) [H04W 72/14 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A radio receiver, comprising:
a receiving stage configured to receive one of an enhanced physical downlink control channel (EPDCCH) and a physical downlink control channel (PDCCH), the one of the EPDCCH and PDCCH comprising an uplink grant;
a decoding stage comprising a physical layer (PHY) device, the PHY device configured to decode the one of the EPDCCH and PDCCH and to derive a time budget from a decoded uplink grant, the decoding stage is configured to derive a reduced time budget for processing the uplink transport block from the time budget, the reduced time budget being smaller when the one of the EPDCCH and PDCCH is the EPDCCH compared with when the one of the EPDCCH and PDCCH is the PDCCH;
a processing stage comprising a media access control layer (MAC) device, the MAC device configured to determine an amount of payload potentially generated for an uplink transport block based on the time budget, the PHY device configured to indicate the reduced time budget to the MAC device, the MAC device configured to process the uplink transport block based on the reduced time budget, and the processing stage to generate a payload section of the uplink transport block based on the determined amount of payload; and
an encoding stage configured to generate a padding section of the uplink transport block and to encode the uplink transport block comprising the payload section and the padding section.