	US 11,689,223 B2
	Device-tailored model-free error correction in quantum processors
Alan Aspuru-Guzik, Cambridge, MA (US); Jonathan P. Olson, Cambridge, MA (US); Jhonathan Romero Fontalvo, Cambridge, MA (US); Peter D. Johnson, Cambridge, MA (US); Yudong Cao, Cambridge, MA (US); and Pierre-Luc Dallaire-Demers, Cambridge, MA (US)
Assigned to President and Fellows of Harvard College, Cambridge, MA (US)
Appl. No. 16/647,188
Filed by President and Fellows of Harvard College, Cambridge, MA (US)
PCT Filed Sep. 14, 2018, PCT No. PCT/US2018/051168 § 371(c)(1), (2) Date Mar. 13, 2020, PCT Pub. No. WO2019/055843, PCT Pub. Date Mar. 21, 2019.
Claims priority of provisional application 62/559,081, filed on Sep. 15, 2017.
Claims priority of provisional application 62/579,485, filed on Oct. 31, 2017.
Claims priority of provisional application 62/581,979, filed on Nov. 6, 2017.
Prior Publication US 2020/0274554 A1, Aug. 27, 2020
Int. Cl. H03M 13/00 (2006.01); H03M 13/15 (2006.01); G06N 10/00 (2022.01); G06N 20/00 (2019.01); G06N 10/70 (2022.01)

CPC H03M 13/1575 (2013.01) [G06N 10/00 (2019.01); G06N 10/70 (2022.01); G06N 20/00 (2019.01)]

49 Claims

1. A method for error correction in a quantum circuit, the method comprising:

configuring a quantum circuit according to a plurality of configuration parameters, the quantum circuit comprising an encoding circuit and a decoding circuit;

inputting each of a plurality of training states to the quantum circuit, each training state comprising a plurality of logical qubits;

applying the encoding circuit to each of the plurality of training states and to a plurality of input syndrome qubits, each syndrome qubit having a default state, to produce encoded training states;

applying the decoding circuit to each of the encoded training states to determine a plurality of outputs;

measuring a fidelity of the quantum circuit for the plurality of training states based on the plurality of outputs;

providing the fidelity to a computing node;

determining a first plurality of optimized configuration parameters by the computing node, the first plurality of optimized configuration parameters maximizing the fidelity of the encoding circuit for the plurality of training states.