CPC H01L 29/42376 (2013.01) [H01L 21/28123 (2013.01); H01L 21/76224 (2013.01); H01L 29/0692 (2013.01); H01L 29/0847 (2013.01); H01L 29/1033 (2013.01); H01L 29/4238 (2013.01); H01L 29/6659 (2013.01); H01L 29/66598 (2013.01); H01L 29/7833 (2013.01); H01L 29/7834 (2013.01); H01L 29/665 (2013.01)] | 20 Claims |
1. An integrated chip, comprising:
an isolation structure arranged within a substrate and having one or more surfaces defining one or more trenches that are recessed below an uppermost surface of the isolation structure and that are disposed along opposing sides of an active region of the substrate; and
a conductive gate arranged over the substrate between a source region and a drain region, wherein the conductive gate extends into the one or more trenches disposed along the opposing sides of the active region of the substrate, and wherein the conductive gate has an upper surface that continuously extends past opposing sides of the one or more trenches.
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