US 11,688,691 B2
Method of making standard cells having via rail and deep via structures
Wei-Cheng Lin, Taichung (TW); Cheng-Chi Chuang, New Taipei (TW); Chih-Liang Chen, Hsinchu (TW); Charles Chew-Yuen Young, Cupertino, CA (US); Hui-Ting Yang, Zhubei (TW); and Wayne Lai, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Feb. 1, 2021, as Appl. No. 17/164,449.
Application 17/164,449 is a division of application No. 15/938,258, filed on Mar. 28, 2018, granted, now 10,930,595.
Claims priority of provisional application 62/564,810, filed on Sep. 28, 2017.
Prior Publication US 2021/0183772 A1, Jun. 17, 2021
Int. Cl. H01L 23/535 (2006.01); H01L 21/768 (2006.01); H01L 27/02 (2006.01); H01L 27/088 (2006.01); H01L 27/118 (2006.01); H01L 29/78 (2006.01)
CPC H01L 23/535 (2013.01) [H01L 21/76895 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 27/11807 (2013.01); H01L 29/785 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11881 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for forming a semiconductor structure, comprising:
forming a plurality of source/drain (S/D) contact structures;
depositing a first conductive material to form first and second via rail structures, wherein at least one of the first and second via rail structures is in physical contact with two or more S/D contact structures of the plurality of S/D contact structures, wherein the at least one of the first and second via rail structures extends above opposing vertical sidewalls of each of the two or more S/D contact structures of the plurality of S/D contact structures;
depositing a second conductive material to form a deep via in physical contact with the second via rail structure;
forming a first interconnect line above the first and second via rail structures and in physical contact with the first via rail structure, wherein the first interconnect line is formed in a lowest wiring level; and
forming a second interconnect line over and physically connected to the deep via, wherein the second interconnect line is in a second lowest wiring level.