US 11,688,647 B2
Semiconductor device and method for manufacturing the same
Bwo-Ning Chen, Keelung (TW); Xu-Sheng Wu, Hsinchu (TW); and Chang-Miao Liu, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed on Jul. 28, 2021, as Appl. No. 17/387,931.
Application 17/387,931 is a division of application No. 16/699,496, filed on Nov. 29, 2019, granted, now 11,081,401.
Prior Publication US 2021/0358814 A1, Nov. 18, 2021
Int. Cl. H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/823821 (2013.01) [H01L 21/02126 (2013.01); H01L 21/02337 (2013.01); H01L 21/02348 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01); H01L 29/66545 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
an N-type fin-like field effect transistor comprising:
a first semiconductor fin;
a gate structure across the first semiconductor fin; and
a first source/drain feature in contact with the first semiconductor fin;
a P-type fin-like field effect transistor comprising:
a second semiconductor fin;
the gate structure across the second semiconductor fin; and
a second source/drain feature in contact with the second semiconductor fin;
a shallow trench isolation (STI) structure surrounding the first and second semiconductor fins;
a first interlayer dielectric (ILD) layer covering the first source/drain feature; and
a second ILD layer covering the second source/drain feature, wherein a porosity of the second ILD layer is greater than a porosity of the first ILD layer.