US 11,688,625 B2
Method for manufacturing semiconductor device
Po-Kai Hsiao, Changhua County (TW); Tsai-Yu Huang, Taoyuan (TW); Hui-Cheng Chang, Tainan (TW); and Yee-Chia Yeo, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW)
Filed on Aug. 30, 2021, as Appl. No. 17/461,338.
Prior Publication US 2023/0068951 A1, Mar. 2, 2023
Int. Cl. H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01)
CPC H01L 21/76224 (2013.01) [H01L 29/66545 (2013.01); H01L 29/66742 (2013.01); H01L 29/66795 (2013.01); H01L 21/0243 (2013.01); H01L 21/0245 (2013.01); H01L 21/02488 (2013.01); H01L 21/02502 (2013.01); H01L 21/02532 (2013.01); H01L 21/02667 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device, comprising: forming at least one epitaxial layer over a substrate; forming a mask over the epitaxial layer; patterning the epitaxial layer into a semiconductor fin; depositing a conformal semiconductor capping layer over the semiconductor fin and the mask, wherein the conformal semiconductor capping layer has a first portion that is amorphous on a sidewall of the mask and a second portion that is crystalline on a sidewall of the semiconductor fin; performing a thermal treatment such that the first portion of the conformal semiconductor capping layer is converted from amorphous into crystalline; forming an isolation structure around the semiconductor fin; and forming a gate structure over the semiconductor fin.