US 11,688,485 B2
Self-adaptive read voltage adjustment using boundary error statistics for memories with time-varying error rates
Tingjun Xie, Milpitas, CA (US); and Zhengang Chen, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 27, 2021, as Appl. No. 17/443,746.
Application 17/443,746 is a continuation of application No. 16/510,483, filed on Jul. 12, 2019, granted, now 11,107,550.
Prior Publication US 2021/0358561 A1, Nov. 18, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 29/50 (2006.01); G06F 11/07 (2006.01)
CPC G11C 29/50004 (2013.01) [G06F 11/073 (2013.01); G11C 29/50012 (2013.01); G11C 2029/5004 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
determining a first error rate corresponding to a first set of write-to-read delay times at a first end of a range of a plurality of write-to-read delay times for the memory device and a second error rate corresponding to a second set of write-to-read delay times at a second end of the range of the plurality of write-to-read delay times, wherein the first set comprises different write-to-read delay times than the second set;
determining whether a ratio of the first error rate to the second error rate satisfies a first threshold criterion; and
responsive to the ratio of the first error rate to the second error rate not satisfying the first threshold criterion, adjusting a read voltage level associated with the range of the plurality of write-to-read delay times.