US 11,688,481 B2
Semiconductor memory devices with diode-connected MOS
Perng-Fei Yuh, Hsinchu (TW); Tung-Cheng Chang, Xihu Township (TW); Gu-Huan Li, Zhubei (TW); Chia-En Huang, Xinfeng Township (TW); Jimmy Lee, Hsinchu (TW); and Yih Wang, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu (TW)
Filed on Sep. 24, 2021, as Appl. No. 17/484,730.
Claims priority of provisional application 63/172,388, filed on Apr. 8, 2021.
Prior Publication US 2022/0328116 A1, Oct. 13, 2022
Int. Cl. G11C 17/16 (2006.01); G11C 17/18 (2006.01); H10B 20/20 (2023.01)
CPC G11C 17/16 (2013.01) [G11C 17/18 (2013.01); H10B 20/20 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line (WL), a gate control line, and a bit line (BL);
wherein each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor; and
wherein the first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.