CPC G11C 11/161 (2013.01) [G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 11/18 (2013.01); H10B 61/00 (2023.02); H10N 52/101 (2023.02); H10N 52/80 (2023.02)] | 19 Claims |
1. A memory cell, comprising:
a semiconductor layer;
a first electrode coupled to the semiconductor layer;
a second electrode coupled to the semiconductor layer, wherein the first and second electrodes are separated from one another along a first axis and wherein the semiconductor layer extends beyond the first axis along a second axis substantially perpendicular to the first axis, thereby forming a first wing;
a third electrode separated from the semiconductor layer by an insulating layer;
a first magnetic tunnel junction (MTJ) disposed on the first wing; and
a first read electrode coupled to the first MTJ.
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