US 11,688,436 B2
Sense amplifier and operating method for non-volatile memory with reduced need on adjusting offset to compensate the mismatch
Ku-Feng Lin, New Taipei (TW); and Yu-Der Chih, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on May 31, 2022, as Appl. No. 17/829,333.
Application 17/829,333 is a continuation of application No. 17/096,966, filed on Nov. 13, 2020, granted, now 11,380,371.
Prior Publication US 2022/0293141 A1, Sep. 15, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 7/02 (2006.01); G11C 7/06 (2006.01); G11C 7/08 (2006.01); G11C 7/12 (2006.01)
CPC G11C 7/062 (2013.01) [G11C 7/08 (2013.01); G11C 7/12 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A sense amplifier, comprising:
a voltage comparator with offset compensation, coupled to a bit line and a reference bit line via a first I/O node and a second I/O node of the sense amplifier respectively, and configured to compare a first input voltage and a second input voltage to output a sensing signal;
a first clamping circuit, coupled between the first I/O node of the sense amplifier and the bit line; and
a second clamping circuit, coupled between the second I/O node of the sense amplifier and the reference bit line,
wherein at least one of the first clamping circuit and the second clamping circuit perform a trimming correction function for matching a first threshold voltage of the first clamping circuit with a second threshold voltage of the second clamping circuit.