CPC G06K 19/0772 (2013.01) [G06K 19/0701 (2013.01); H05K 1/028 (2013.01); H05K 1/0296 (2013.01); H05K 2201/10098 (2013.01); H05K 2201/10159 (2013.01)] | 20 Claims |
1. An integrated circuit, comprising:
a memory;
a power supply wiring;
a ground wiring;
at least one identification mark pattern respectively having a first conductive wiring and a second conductive wiring overlapping each other, wherein the first conductive wiring is electrically connected to the power supply wiring, and the second conductive wiring is electrically connected to the ground wiring,
wherein the at least one identification mark pattern is identified by one of hollow portion and contour of the first conductive wiring of the at least one identification mark pattern, and the second conductive wiring of the at least one identification mark pattern is disposed between the first conductive wiring of the at least one identification mark pattern and a substrate,
wherein the power supply wiring and the ground wiring are electrically connected to at least one rectifier, and a plurality of first channel directions, which are from a source to a drain, in a plurality of transistors of the memory are the same as a plurality of second channel directions, which are from the source to the drain, in a plurality of transistors of the at least one rectifier.
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