CPC G06F 13/1689 (2013.01) [H01L 24/06 (2013.01); H01L 24/17 (2013.01); H01L 25/0657 (2013.01); H01L 24/73 (2013.01); H01L 2224/0401 (2013.01); H01L 2225/06541 (2013.01); H01L 2924/1432 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1437 (2013.01); H03K 3/0372 (2013.01); H03L 7/081 (2013.01)] | 22 Claims |
1. An interface for a semiconductor device, the semiconductor device including a master device and a plurality of slave devices, wherein the master device and the slave devices are stacked up with electric connection, the interface comprising:
a master interface, implemented in the master device and including a master interface circuit with a master bond pattern;
a slave interface, implemented in each of the slave devices and including a slave interface circuit with a slave bond pattern to correspondingly connect to the master bond pattern; and
a clock route, to transmit a clock signal through the master interface and the slave interface,
wherein the master device transmits a command and a selecting slave identification through the master interface to all the slave interfaces;
wherein one of the slave devices corresponding to the selecting slave identification executes the command and responds a result back to the master device through the slave interfaces and the master interface.
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