CPC G06F 11/1044 (2013.01) [G06F 11/0772 (2013.01); G06F 11/0793 (2013.01)] | 24 Claims |
1. A memory device comprising:
a memory controller;
a memory media to store data; and
media access circuitry, separate from the memory controller and local to the memory media, to:
use a reference voltage to read data from the memory media, the reference voltage set in the memory media based on a reference voltage value,
manage an error correction code (ECC) adjustment state to indicate whether errors in the data read from the memory media are any one of correctable and not correctable in the media access circuitry using an ECC, and
perform a compute-in-memory (CIM) operation on the data read from the memory media based on the ECC adjustment state, including to:
determine that the adjustment state is present to pause performance of the CIM operation, and
determine that the adjustment state has been eliminated to resume performance of the CIM operation.
|