CPC G06F 1/3296 (2013.01) [G06F 1/324 (2013.01)] | 20 Claims |
1. A system for dynamic voltage and frequency scaling of operating processing cores, the system comprising:
a stacked circuit configuration including at least two or more processor core devices, each processor core device having a first terminal for connection to a first voltage rail conductor and having a second terminal connection for connection to a second lower voltage rail conductor, each said processor core device comprising a state monitor unit for monitoring a functional state of said processor core device;
a current provision network comprising first tunable current supplying devices interconnecting first terminals of a plurality of said at least two or more processor core devices to the first voltage rail conductor and second tunable current supplying devices interconnecting the second terminals of a plurality of said at least two or more processor core devices to the second lower voltage rail conductor, and a plurality of tunable bridge current supplying devices interconnecting a first terminal of each of a respective subset of processor core devices to a second terminal of each of a plurality of other processor core devices of said subset; and
a control unit including a processor for receiving real-time functional state monitor signals issuing from said state monitor unit of said processor core devices and issuing one or more control signals and for adjusting a resistance of one or more said first tunable current supplying devices, said second tunable current supplying devices or said tunable bridge current supplying devices to thereby adjust a voltage across a processor core device to achieve a target frequency of operation at said processor core in response to the received real-time state monitor signals.
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